QuickLogic Corporation (QUIK) Earnings

Management highlights

- New Product Milestones * The new radiation-hardened RadPro FPGA and associated Development Kit was demonstrated at the HART conference in April 2026. The internally funded test chip was fabricated on the Global Foundries 12LP process, which is commonly used for radiation-hardened ASICs. Multiple RadPro dev kits have already shipped, and these shipments will contribute a low six-figure amount to Q2 revenue. An MOU for accelerated mutual evaluation of a potential RadPro chiplet application has already been signed with one Defense Industrial Base (DIB) customer. * QuickLogic has now secured its fourth contract targeting Intel 18A technology, with the total value of all four initial contracts reaching nearly $2 million. The 1 million LUT feasibility study (third contract) delivered notable architectural enhancements that expand the company's serviceable addressable market (SAM) to include very high-density eFPGA cores for ASIC designs and very high-density discrete FPGAs. The fourth contract will deliver hard IP for a large Intel 18A eFPGA core for a customer ASIC, with tape-out targeted for H2 2026. A fifth mid six-figure contract with this customer is anticipated in H2 2026, and discussions have expanded to include potential QuickLogic storefront services for the customer's ASIC. * A new seven-figure DIB contract was finalized after quarter-end, and will contribute to Q2 revenue. This contract includes development of an evaluation kit scheduled for late 2026, compatible with common third-party development environments for both DIB and commercial customers, and the company is exploring using the contract's FPGA for a storefront chiplet. - Business Development & Partnerships * QuickLogic is a member of the Intel Foundry Accelerator Ecosystem Alliance Program, participating in the Chiplet, IP, and USMAG alliances. The company is seeing growing traction in the chiplet market, with numerous proposals in progress for U.S. government, DIB, and commercial applications across multiple fabrication nodes. The company's digital proof-of-concept chiplet program, which leverages existing IP for low-investment rapid development, was presented at the Chiplet Summit and GOMAC Tech Conference, and management believes a storefront FPGA chiplet is the ideal solution to address current interoperability gaps. * Idaho Scientific has selected QuickLogic eFPGA hard IP for cryptographic security solutions, with tape-out anticipated in 2027. Following Idaho Scientific's integration into General Dynamics Mission Systems, management expects new opportunities for QuickLogic may emerge from this relationship. * The company appointed Quantum Leap Solutions as an authorized sales representative for its IP and chiplet offerings, to expand reach into new commercial and defense accounts by leveraging the rep's existing relationships with ASIC design teams on a success-based, variable cost model. - Financial Performance * Non-GAAP gross margin for Q1 was 39.6%, below the 45% guidance range due to $298,000 in inventory reserve charges. Non-GAAP operating expenses were $3.3 million, and non-GAAP net loss was $1.3 million ($0.08 per share). End-of-quarter net cash totaled $6 million, which includes $3.2 million raised via the company's at-the-market (ATM) equity program during Q1.

Guidance

- Full year 2026 revenue guidance is maintained at 50% to 100% year-over-year growth. With Q1 actual results and Q2 guidance, the first half of 2026 is already on track to hit ~80% of total 2025 revenue, so management expects full year results will land toward the upper end of the guided range. - Q2 FY2026 total revenue guidance is $6 million, plus or minus 10%, consisting of $5.2 million in new product revenue and $0.8 million in mature product revenue. - Full year 2026 non-GAAP gross margin guidance is maintained at approximately 57%, with Q2 non-GAAP gross margin expected to be 42% plus or minus 5% (the first half weighted lower due to mix of lower-margin professional services, with higher-margin product and IP revenue expected to dominate the second half). - Q2 non-GAAP operating expenses are expected to be approximately $3.3 million plus or minus 5%, and full year non-GAAP operating expenses guidance is maintained at $13.5 million, a 14% increase from 2025 to support projected 50% to 100% revenue growth. - Q2 non-GAAP net loss is forecasted at approximately $800,000 ($0.04 per share). Non-GAAP profitability is expected for the second half of 2026. - The company raised $6.4 million in net proceeds via its ATM in Q2, and does not anticipate further ATM sales for the remainder of FY2026. End-of-Q2 net cash is expected to be just under $12 million, and positive operating cash flow is expected in H2 2026. - The company secured a new banking agreement with more favorable terms and lower borrowing costs, and reduced its credit line to $10 million.

Segment performance

QuickLogic reports two product segments: new products and mature products. For Q1 FY2026: - Total company revenue: $5.1 million, up 16.5% year-over-year (YoY) and 35.3% quarter-over-quarter (QoQ). - New product revenue: $4.3 million, representing 84.3% of total Q1 revenue. This was up 14.2% YoY and 50.7% QoQ. - Mature product revenue: $0.8 million, representing 15.7% of total Q1 revenue. This was up 31.7% YoY and down 14.2% QoQ. For the full year 2026, total mature product revenue is expected to reach approximately $4 million.

Risks & headwinds

- Forward-looking statements are subject to inherent risks and uncertainties that could cause actual results to differ materially from expectations, including: * Delays in market acceptance of new products, failure to convert design opportunities into revenue, or failure to replace revenue from end-of-life products * Uncertain timing of customer design activity, market acceptance of end customer products, and the risk that new orders do not translate into future revenue * Delays or failures in introducing and producing new products based on advanced wafer technology * Inability to successfully market new products based on their low power, competitive pricing, and short time-to-market advantages * Intense competitive pressure in the semiconductor IP and FPGA markets * Challenges hiring and retaining qualified engineering and technical personnel * Unanticipated changes in product demand or supply chain disruptions * Broad macroeconomic risks, including general economic weakness, political events, international trade disputes, natural disasters, and other business interruptions that can disrupt supply, delivery, or demand * Changes in applicable tax rates and exposure to unanticipated additional tax liabilities * Uncertain timing of government contract awards and funding

Analyst Q&A

• Q: Richard Shannon (Craig Callum Capital) asked if the 12-month customer evaluation timeline for RadPro FPGA dev kits is aligned with key program schedules, and what milestones to expect going forward. /

  A: Management confirmed the evaluation timeline aligns with pre-modeled schedules for key target programs. Internally funded development of the test chip allowed QuickLogic to ship dev kits within the required customer evaluation window, and uptake of orders and pricing requests has been strong. Customers will complete functional and radiation testing throughout 2026, with design interest feedback expected by the end of the year. This timeline aligns with the 2027 product launch schedule for production RadPro chips.

• Q: Shannon asked for an update on the 50% to 100% full year 2026 revenue growth target, and whether the outcome is trending toward the low or high end of the range. /

  A: Management reaffirmed the full year target is unchanged. With Q1 actual results and Q2 guidance, first half 2026 revenue will equal ~80% of total 2025 full year revenue. With stronger mature product revenue expected in the second half, and solid progress across all growth initiatives, management expects results will land within the guided range, and current momentum puts it on track to move toward the upper end of the range.

• Q: Tyler Burmeister (Lake Street Capital) asked what factors could swing full year results from the low to high end of the 50% to 100% revenue growth range. /

  A: Management noted only a small number of additional major contracts are needed to reach the upper end of the range. Key upside drivers include continued on-schedule execution of existing U.S. government contracts, ongoing RadPro dev kit shipments, the pending fifth Intel 18A contract with the existing DIB customer in H2, and the expected award of a large commercial Intel 18A eFPGA IP contract that was pushed from Q2 to Q3. The recently signed seven-figure DIB contract, which was delayed from Q1, is now on the books, clearing a key milestone.

• Q: Neil Young (Needham & Co) asked what the financial profile of the scaling storefront business will look like, specifically for gross margin and revenue recognition. /

  A: Management explained storefront operates as a traditional semiconductor device business: QuickLogic manages the supply chain, sells finished devices to customers, and recognizes revenue and margin when products ship. R&D costs are largely sunk once devices are finalized, so gross margins are expected to be in the mid-to-high 60% range, consistent with standard FPGA industry margins. Storefront margins will be more stable than current mixed IP/service margins, with less quarterly variability.

• Q: Young asked what role new sales rep Quantum Leap Solutions will play in accelerating customer acquisition. /

  A: Quantum Leap is a success-based indirect sales channel that brings existing relationships with ASIC design teams across both defense and commercial markets, and deep experience selling design-stage products like EDA tools and connector IP. This allows QuickLogic to expand its reach to more potential customers than it could serve with its small direct sales force, while keeping sales costs variable and aligned with revenue results.