Atomera Incorporated Q4 FY2025 earnings call

• In the fourth quarter, Atomera made progress with existing customers in targeted segments, started new customer engagements in nontraditional areas, and entered government-funded collaborative developments.
• On Gate-All-Around transistor technology, recent silicon results showed MST can be deposited into nanosheet structures and provides superior diffusion blocking. Anticipate implementing with leading players in next few quarters.
• In DRAM, working on enhancing next-gen architectures and wafer-based solutions; some preliminary results promising.
• In RF-SOI, offering strong performance improvements with wafer-based solutions and working with key players.
• In power, working with large players, uncovered MST opportunity for energy efficiency in AI data centers, and demonstrated MST improvement for HBT devices.
• In GaN, first commercial customer started running wafers, and GaN on Silicon concept paper approved for funding proposal stage.

In 2025, revenue was $65,000, consisting of NRE fees for wafer deliveries and MST CAD licensing. The GAAP net loss for the year ended December 31, 2025, was $20.2 million or $0.65 per share, while the non-GAAP net loss was $16.1 million or $0.52 per share. For the fourth quarter of 2025, the non-GAAP net loss was $3.3 million or $0.10 per share. Revenue in Q1 2025 is expected to be in the range of $50,000 to $100,000 from shipment of MST wafers to customers.

• Q1 2025 revenue expected $50,000 to $100,000 from MST wafer shipments.
• 2026 non-GAAP operating expense expected to be approximately $18.5 million, which is a 17% increase from 2025, but ~8% normalized for executive bonus timing. Requires executing against aggressive commercial milestones to earn deferred bonuses.

Q: Can you elaborate on the confidence in Gate-All-Around technology progress?

A: MST deposition in tiny structures was proven, and recent test data shows it can block dopant diffusion better than alternatives. Confident in moving forward with customers soon.

Q: Describe power space coverage?

A: RF-SOI has compact customer base with vast majority engaged; power is larger and more diverse, expanding engagement with multiple companies but not vast majority yet.

Q: Update on VP of Sales Wei?

A: Wei joined in October, helping with existing and new customers, bringing in past relationships, and driving sales efforts positively.

Q: Wafer activity and TCAD accuracy?

A: Many customer wafer runs, shipped out, waiting 6-9 months for test results. Confident TCAD is accurate and hopeful for productization if results good.

Q: Why selling blank wafers helps go to market?

A: Blank wafers allow customers to deposit MST immediately without integration engineering challenges of depositing in middle of complex structures, enabling faster time to revenue.

Q: MST in AI power saving?

A: Helps with performance improvements leading to power savings, such as in 48-volt power supplies and GaN devices used in AI data centers.

Q: Update on JDA1 and JDA2?

A: Working with JDA1, hopeful technologies discussed will drive progress; JDA2 is running wafers with Atomera but details not disclosed.

Q: MST evaluation at customer fabs for Gate-All-Around?

A: Working with one Gate-All-Around customer, data shows MST can be deposited and blocks dopant diffusion; evaluation progress depends on customer adoption, which could be fast as Gate-All-Around teams work quickly.

Q: MST in quantum computing?

A: Working on it, but previous theory about Silicon-28 didn't pan out; working on other technologies and hope to discuss progress later.